

elaboration
/ɪˌlæbəˈreɪʃən/ /iˌlæbəˈreɪʃən/


noun
Setting up a hierarchy of calculated constants in a language such as Ada so that the values of one or more of them determine others further down in the hierarchy.

noun
The process of taking a parsed tree of an abstract integrated circuit definition in a language such as Verilog and creating a hierarchy of module instances that ends with primitive (atomic) gates and statements.

